OptEM Inspector is a device, interconnect and substrate extraction software tool for submicron digital, analog, and mixed-signal IC designs.
Submicron IC designers face new challenges as feature sizes shrink, wires are more densely packed, and operating speeds increase. In this design environment interconnect delays play a dominant role, and second-order effects such as cross-coupling become significant. An electromagnetic analysis is required in today's complex high-performance designs in order to calculate accurate interconnect and device parasitics. OptEM Inspector is an interconnect and device extraction software tool for submicron digital, analog and mixed signal IC designs.
OptEM Inspector is a software tool that screens the physical IC layout, and extracts the resistance and capacitance of the interconnects and devices. What is unique about OptEM Inspector is its capability to extract device substrate resistance in addition to the interconnect resistance and fringe, area, and lateral capacitances. The substrate resistance and lateral capacitance are critical because of their effect on crosstalk at the submicron level. Both 2D and 3D electromagnetic field analysis techniques are used to accurately and efficiently extract these RC values from the layout.
The technology information required by OptEM Inspector is characterized through device mask combinations and a fabrication sequence. Initially, interconnects are described using a set of process steps where layers of dielectric and conductive materials are stacked upon one another at varying thicknesses and heights. No limitation is imposed on the number of metal layers. The 2D and 3D electromagnetic analysis supports conformal geometries and parametric variations of thickness, height, and conductor edges thereby providing a much greater degree of accuracy. Devices are described by identifying different combinations of mask layers.
OptEM Inspector's screening and extraction depend on technology and layout information provided by the designer. This includes a fabrication process description, active device definition, and GDSII data. Inspector runs a 2D and 3D field solution to determine the interconnect and device parasitic RCs. The choice of field solution depends on the level of accuracy required. On output, OptEM Inspector provides a screening report listing the cell hierarchy, and circuit models of the extracted cells in standard output formats including SPICE, HSPICE, VHDL and others.